Multi-layered framework for security of integrated circuits

Abstract

Various embodiments of the present disclosure provide a multi-layered framework for security of integrated circuits. In one example, an embodiment provides for removing one or more routing tables in a Register Transfer Level (RTL) source code that models a design for an SoC via a hardware description language, comprising replacing the one or more routing tables in the RTL source code with respective programmable memory, transforming a state space of one or more embedded state machines in the RTL source code, transforming one or more portions of combinational logic in the RTL source code, and/or removing one or more portions of security-critical logic in the RTL source code, comprising replacing the one or more portions of security-critical logic in the RTL source code with respective lookup tables.

Type
Reiner Dizon-Paradis
Reiner Dizon-Paradis
Postdoctoral Research Associate

My research interests include machine learning applications in national security, hardware security and assurance, artificial intelligence of Things, and robotics.